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ds04-28313-1e fujitsu semiconductor data sheet assp image processing bipolar d/a converter (1-ch, 8-bit, 60 msps) mb40768h n description the mb40768h is a low-power and high-speed 8-bit d/a converter. the digital input is ttl compatible and the analog output voltage is 3 to 5 v. maximum conversion speed is 60 mhz. the internal reference voltage provided has two types of resistor division scheme and band-gap reference scheme; the external reference voltage may also be used. the mb40768h is suitable for high-definition tv or vcr application. n features ? resolution: 8 bits ? conversion characteristics: maximum conversion rate: 60 msps [min.] linearity error: 0.2 % [max.] ? i/o: digital input voltage: ttl level analog output voltage: 2v p-p (3 to 5 v) ? reference voltage: v rout1 : resistor division circuit (0.6 v cca ) v rout2 : band-gap reference circuit (v cca C 2 v) ? power supply voltage: +5 v single power supply ? power consumption: 160 mw [typical value for the analog output voltage of 2 v p-p ] 120 mw [typical value for the analog output voltage of 1 v p-p ] n packages 18-pin plastic dip (dip-18p-m02) 20-pin plastic sop (fpt-20p-m01)
2 mb40768h n pin assignments n pin descriptions pin no. pin name i/o description dip sop 1 to 8 1 to 8 d 1 to d 8 i input pins for data signals (d 1 : msb, d 8 : lsb) 18 20 clk i input pin for clock signal 17 19 v ccd digital power supply pin (+5 v) 16 18 v cca analog power supply pin (+5 v) 9 10 d.gnd digital ground pin (0 v) 10 11 a.gnd analog ground pin (0 v) 13 15 v rin i reference voltage input pin. used for setting dynamic range for analog output. connect this pin with either v rout1 or v rout2 pin when using the internal reference voltage. when using the external reference voltage, use it within the range of 2.65 to 4.3 v or for the v cca C v rin range of 0.7 to 2.2 v. 12 14 v rout1 o reference voltage output pin 1. resistance division reference voltage, with its output voltage set to 0.6 v cca . this pin, if connected with the v rin pin, provides v cca analog output voltage at 0.6 v cca . 14 16 v rout2 o reference voltage output pin 2. band-gap reference voltage, with its output voltage set to v cca C 2 [v]. this pin, if connected with the v rin pin, provides the v cca analog output voltage at v cca 1 C 2 [v]. 11 12 comp phase compensated capacitance pin. insert the capacitance of 0.1 m f or more between this pin and the a.gnd for the phase compensated capacitance. 15 17 a.out o analog signal output pin 9, 13 n.c. no connection pins 1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 clk (msb) d 1 (lsb) d 8 d 7 d 6 d 5 d 4 d 3 d 2 d.gnd v ccd a.out a.gnd comp v cca v rout2 v rin v rout1 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 10 (msb) d 1 (lsb) d 8 d 7 d 6 d 5 d 4 d 3 d 2 d.gnd n.c. clk v ccd a.out a.gnd comp v cca v rout2 v rin v rout1 n.c. 19 20 (top view) (top view) (fpt-20p-m01) (dip-18p-m02)
3 mb40768h n block diagram clk (msb) d 1 d 7 d 6 d 5 d 4 d 3 d 2 d.gnd v ccd a.out a.gnd comp v cca v rout2 v rin v rout1 d 8 (lsb) v cca amp reference resistor reference voltage 1 0.6 v cca r r r r r r 2r 2r 2r 2r r 8 8 8 input buffer master slave flip-flop buffer current switch reference voltage 2 v cca ?2 v
4 mb40768h n absolute maximum ratings (see warning) (a.gnd = d.gnd = 0 v) warning: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. n recommended operating conditions (a.gnd = d.gnd = 0 v) parameter symbol rating units power supply voltage analog power supply voltage v cca C0.5 to +7.0 v digital power supply voltage v ccd C0.5 to +7.0 v power supply voltage difference v ccd C v cca 1.5 v digital signal input voltage v id C0.5 to +7.0 v storage temperature tstg C55 to +125 c parameter symbol value units min. typ. max. power supply voltage analog power supply voltage v cca 4.75 5.00 5.25 v digital power supply voltage v ccd 4.75 5.00 5.25 v power supply voltage difference v cca C v ccd C0.2 0.2 v analog reference voltage v cca C v rin 0.70 2.00 2.20 v v rin 2.65 3.00 4.30 v digital high level input voltage v ihd 2.0 v digital low level input voltage v ild 0.8v clock frequency f clk 60 mhz setup time t su 8ns hold time t h 2ns high level minimum pulse width t wh 6.5 ns low level minimum pulse width t wl 6.5 ns phase compensated capacitance c comp 0.1 m f operating ambient temperature top C20 +75 c
5 mb40768h n electric characteristics 1. dc characteristics (v cca = v ccd = 4.75 v to 5.25 v, a.gnd = d.gnd = 0 v, ta = C20 c to +75 c) * : v cca = v ccd = 5 v 2. ac characteristics (v cca = v ccd = 4.75 v to 5.25 v, a.gnd = d.gnd = 0 v, ta = C20 c to +75 c) parameter symbol condition value units min. typ. max. resolution 8 bit linearity error le dc precision 0.2 % digital high level input current i ihd v ihd = 2.7 v 20 m a digital low level input current i ild v ild = 0.4 v C100 m a reference input current i rin v rin = 3.000 v 10 m a resistance division method reference voltage v rout1 v cca = 5.00 v v ccd = 5.00 v 2.900 3.000 3.100 v band-gap reference method reference voltage v rout2 v cca C 2.100 v cca C 2.000 v cca C 1.900 v temperature coefficient 100 ppm/ c full-scale output voltage v ofs v cca C 20 v cca mv zero-scale output voltage v ozs v cca = 5.00 v v ccd = 5.00 v v rin = 3.000 v 2.938 3.008 3.078 v output resistance r o ta = +25c 192 240 288 w current consumption i cc v cca = 5.25 v v ccd = 5.25 v v rin = v rout1 32* 56 ma parameter symbol condition value units min. typ. max. maximum conversion rate f s c l = 15 pf terminal resistance at a.out pin = 240 w 60 msps output propagation time t pd 7ns output rise time t r 5ns output fall time t f 5ns settling time t set 15ns
6 mb40768h n timing diagram data input clock input analog ouput v ihd v ild v ihd v ild v ofs v ozs 1.5 v 1.5 v 90 % 50 % 10 % 90 % 50 % ?/2 lsb ?/2 lsb t plh t setlh t phl t sethl t wl t wh t h t su 3 v 0 v 3 v 0 v t f t r 10 %
7 mb40768h n digital input equivalent circuit n analog output equivalent circuit n reference voltage output equivalent circuit 50 k w 50 k w v ccd d.gnd digital input clk, d 1 to d 8 threshold voltage = 1.4 v v cca i o a.out a.gnd r o = 240 w v cca a.gnd 4 k w 6 k w v rout1 + bgr v cca r s * v rout2 *: overcurrent protection resistor (2 k w ) when short-circuited to gnd.
8 mb40768h n dac output voltage characteristic n equation for ideal dac output voltage input d 1 to d 8 ff 00 output a.out 5.000 v (v cca ) v ofs v ozs (v rin ) 5.000 v 3.000 v 3.008 v 1 lsb = 8 mv . . a.out = v cca C (v cca C v rin ) (n: digital input code for 0 to 255) v ofs = v cca v ozs = v cca C 255 256 (v cca C v rin ) 255 Cn 256
9 mb40768h n standard example of connection n notes on usage ? countermeasures for switching noise to prevent the switching noise riding on the analog output signal to the maximum possible extent, insert the noise limiting capacitor between v cca -a.gnd pins, and between v ccd -d.gnd pins closest as possible to the ic pins. ? power supply patterns to reduce parasitic impedance, use the patterns as wide as possible to be connected to the v cca , v ccd , a.gnd and d.gnd pins. 2.2 m h 2.2 m h 0.01 m f 47 m f 47 m f 0.01 m f 5 v v ccd v cca d 1 to d 8 clk d.gnd a.gnd comp v rout1 v rin v rout2 a.out connected to v rout1 or v rout2 pin or external reference voltage 0.1 m f data input clk input
10 mb40768h n typical characteristic curves (continued) v cc = 5.25 v v rin = v rout1 100 80 60 40 20 0 power supply current i cc (ma) 0 ?5 25 50 75 100 ambient temperature ta ( c) v cc = 5.00 v v rin = 3.000 v 100 75 50 25 0 ?5 ambient temperature ta ( c) 0.2 0.15 0.1 0.05 0 linearity error |le| (%) 300 280 260 240 220 200 output resistance r o ( w ) 0 ?5 25 50 75 100 ambient temperature ta ( c) v cc = 5.00 v v rin = 3.000 v v cc (reference) ?0 ?0 ?0 ?0 full-scale output voltage v ofs (v) 0 ?5 25 50 75 100 ambient temperature ta ( c) v cc = 5.00 v v rin = 3.000 v 100 75 50 25 0 ?5 ambient temperature ta ( c) 3.100 3.050 3.000 2.950 2.900 zero-scale output voltage v ozs (v) v cc = 5.00 v 100 75 50 25 0 ?5 ambient temperature ta ( c) 3.100 3.050 3.000 2.950 2.900 reference output voltage v rout1 (v) power supply current vs ambient temperature 1. output resistance vs ambient temperature 3. linearity error vs ambient temperature 2. full-scale output voltage vs ambient temperature 4. zero-scale output voltage vs ambient temperature 5. v rout1 reference output voltage vs ambient temperature 6.
11 mb40768h (continued) (continued) v rout2 reference output vs ambient temperature 7. setup time vs ambient temperature 9. v rout2 reference output voltage vs power supply voltage 8. setup time vs power supply voltage 10. hold time vs ambient temperature 11. hold time vs power supply voltage 12. v cc = 5.00 v 100 75 50 25 0 ?5 ambient temperature ta ( c) 3.100 3.050 3.000 2.950 2.900 reference output voltage v rout2 (v) ta = +25 c 6.0 5.5 5.0 4.5 4.0 3.5 power supply voltage v cc (v) 2.100 2.050 2.000 1.950 1.900 power supply voltage ?reference output voltage [v cc ?v rout2 ] v cc = 5.00 v 6 4 2 0 setup time t su (ns) 0 ?5 25 50 75 100 ambient temperature ta ( c) 8 10 ta = +25 c 6 4 2 0 setup time t su (ns) 4.0 3.5 4.5 5.0 5.5 6.0 power supply voltage v cc (v) 8 10 v cc = 5.00 v 2 0 ? ? hold time t h (ns) 0 ?5 25 50 75 100 ambient temperature ta ( c) 4 6 ta = +25 c 2 0 ? ? hold time t h (ns) 4.0 3.5 4.5 5.0 5.5 6.0 power supply voltage v cc (v) 4 6
12 mb40768h (continued) minimum clock pulse width vs ambient temperature 13. minimum clock pulse width vs power supply voltage 14. rise time, fall time vs ambient temperature 15. rise time, fall time vs power supply voltage 16. delay time vs ambient temperature 17. delay time vs power supply voltage 18. v cc = 5.00 v 6 4 2 0 minimum clock pulse width t wl , t wh (ns) 0 ?5 25 50 75 100 ambient temperature ta ( c) 8 10 t wl t wh ta = +25 c 6 4 2 0 minimum clock pulse width t wl , t wh (ns) 4.0 3.5 4.5 5.0 5.5 6.0 power supply voltage v cc (v) 8 10 t wh t wl 6 4 2 0 rise time t r , fall time t f (ns) 0 ?5 25 50 75 100 ambient temperature ta ( c) 8 10 v cc = 5 v v rin = 3.000 v c l = 15 pf analog output terminated with 240 w (1 v amplitude) 6 4 2 0 rise time t r , fall time t f (ns) 4.0 3.5 4.5 5.0 5.5 6.0 power supply voltage v cc (v) 8 10 ta = +25 c v rin = 3.000 v c l = 15 pf analog output terminated with 240 w (1 v amplitude) 12 8 4 0 delay time t plh , t phl (ns) 0 ?5 25 50 75 100 ambient temperature ta ( c) 16 20 v cc = 5 v v rin = 3.000 v c l = 15 pf analog output terminated with 240 w (1 v amplitude) 12 8 4 0 delay time t plh , t phl (ns) 4.0 3.5 4.5 5.0 5.5 6.0 power supply voltage v cc (v) 16 20 ta = +25 c v rin = 3.000 v c l = 15 pf analog output terminated with 240 w (1 v amplitude)
13 mb40768h n ordering information part number package remarks mb40768hp 18-pin plastic dip (dip-18p-m02) MB40768HPF 20-pin plastic sop (fpt-20p-m01)
14 mb40768h n package dimensions (continued) 18-pin plastic dip (dip-18p-m02) dimensions in mm (inches) +.012 C0 C.012 +.008 +.006 C.002 C0 +.012 +0.30 C0 +0.14 C0.05 C0 +0.30 +0.20 C0.30 3.00(.118)min 5.00(.197)max typ 7.62(.300) (.244.010) 6.200.25 .047 .868 .018 .047 1.20 (.010.002) 0.250.05 0.45 index-1 max 1.27(.050) 1.20 0.51(.020)min 15max 22.05 typ 2.54(.100) index-2 1994 fujitsu limited d18009s-3c-3 c dimensions in mm (inches)
15 mb40768h (continued) 20-pin plastic sop (fpt-20p-m01) +0.40 C0.20 +.016 C.008 +0.05 C0.02 +.002 C.001 +0.25 C0.20 +.010 C.008 11.43(.450)ref 1.27(.050) typ index 6.80 .268 0.15 .006 12.70 .500 (.307.016) (.209.012) (.018.004) (stand off) (.020.008) 0.500.20 5.300.30 7.800.40 0.05(.002)min 2.25(.089)max 0.450.10 details of "a" part 0.50(.020) 0.20(.008) 0.18(.007)max 0.68(.027)max "a" m ?0.13(.005) 0.10(.004) 1994 fujitsu limited f20003s-5c-4 c dimensions in mm (inches)
16 mb40768h fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-88, japan tel: (044) 754-3763 fax: (044) 754-3329 north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 432-9044/9045 europe fujitsu mikroelektronik gmbh am siebenstein 6-10 63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 asia pacific fujitsu microelectronics asia pte. limited #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281-0770 fax: (65) 281-0220 f9702 ? fujitsu limited printed in japan all rights reserved. circuit diagrams utilizing fujitsu products are included as a means of illustrating typical semiconductor applications. com- plete information sufficient for construction purposes is not nec- essarily given. the information contained in this document has been carefully checked and is believed to be reliable. however, fujitsu as- sumes no responsibility for inaccuracies. the information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by fujitsu. fujitsu reserves the right to change products or specifications without notice. no part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of fujitsu. the information contained in this document are not intended for use with equipments which require extremely high reliability such as aerospace equipments, undersea repeaters, nuclear con- trol systems or medical equipments for life support.

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